Información de la conferencia
ICCD 2025: International Conference on Computer Design
https://www.iccd-conf.com/home.html
Día de Entrega:
2025-05-11
Fecha de Notificación:
2025-08-01
Fecha de Conferencia:
2025-11-10
Ubicación:
Dallas, Texas, USA
Años:
43
CCF: b   QUALIS: a2   Vistas: 92510   Seguidores: 120   Asistentes: 15

Solicitud de Artículos
ICCD encompasses a wide range of topics in the research, design, and implementation of computer systems and their components. ICCD's multi-disciplinary emphasis provides an ideal environment for developers and researchers to discuss practical and theoretical work covering systems and applications, computer architecture, verification and test, design tools and methodologies, circuit design, and technology. We especially encourage submissions that look forward to future systems and technologies in one of the following tracks:

    Computing Systems
    Software Architectures, Compilers, and Tool Chains
    Hardware Architectures
    Test, Verification and Security
    Electronic Design Automation
    Logic and Circuit Design

Track 1. Computing Systems: System architecture; System support for multi/many cores, co-processors, and accelerators; System support for security, reliability, and energy efficiency and proportionality; Virtual memory; System support for emerging technologies, including NVM, quantum, neuromorphic, bio-inspired computing, machine learning and artificial intelligence applications; Storage systems for data center and cloud/edge computing, high-performance computing (HPC), exascale system, and serverless computing.

Track 2. Software Architectures, Compilers, and Tool Chains: Software architectures, compilers, programming language/model, firmware, OS, hypervisor, runtime design, and co-design for embedded/real-time systems; Middleware for embedded systems, including resource-awareness, reconfiguration, energy/power management; compiler support for enhanced debugging, profiling, and traceability.

Track 3. Hardware Architectures: Microarchitecture design techniques for single-threaded and multi/many-core processors, such as instruction-level parallelism, pipelining, caches, branch prediction, multithreading, and networks-on-chip; Techniques for low-power, secure, and reliable processor architectures; Hardware acceleration for emerging applications including NVM, quantum, neuromorphic, bio-inspired; Hardware support for processor virtualization; Real-life design challenges: case studies, tradeoffs, retrospectives.

Track 4. Test, Verification, and Security: Design error debug and diagnosis; Fault modeling; Fault simulation and ATPG; Analog/RF testing; Statistical test methods; Large volume yield analysis and learning; Fault tolerance; DFT and BIST; Functional, transaction-level, RTL, and gate-level modeling and verification of hardware designs; Equivalence checking, property checking, and theorem proving; Constrained-random test generation; High-level design and SoC validation; Hardware security primitives and methodologies; Side-channel analysis, attacks and mitigations for processors and accelerators; Interaction between test, security and trust.

Track 5. Electronic Design Automation: System-level design and synthesis; High-level, logic, and physical synthesis; Analysis and optimization of timing, power, variability/yield, temperature, and noise; Physical design, including partitioning, floorplanning, placement, and routing; Clock tree synthesis; Verification methods at different levels of the EDA flow; Tools for multiple-clock domains, asynchronous, and mixed-timing methodologies; CAD support for accelerators, FPGAs, SoCs, ASICs, NoC, and general-purpose processors; CAD for manufacturing, test, verification, and security; Tools and design methods for emerging technologies (photonics, MEMS, spintronics, nano, quantum); interaction of EDA and AI/ML.

Track 6. Logic and Circuit Design: Circuit design techniques for digital, memory, analog, and mixed-signal systems; Circuit design techniques for high performance and low power; Circuit design techniques for robustness under process variability, electromigration, and radiation; Design techniques for emerging and maturing technologies (MEMS, nano-spintronics, quantum, flexible electronics, multi-gate devices, in-memory computing); Asynchronous circuit design; Signal-processing, graphic-processor, and datapath circuits.
Última Actualización Por Dou Sun en 2025-04-04
Conferencias Relacionadas
CCFCOREQUALISAbreviaciónNombre CompletoEntregaNotificaciónConferencia
aa*a2LICSIEEE Symposium on Logic in Computer Science2025-01-162025-04-082025-06-23
b4CGIMInternational Conference on Computer Graphics and Imaging2012-10-262012-11-152013-02-12
baa1ECCVEuropean Conference on Computer Vision2026-03-062026-05-092026-09-08
cCSRInternational Computer Science Symposium in Russia2019-01-032019-02-252019-07-01
cb1ICVSInternational Conference on Computer Vision Systems2023-06-122023-07-132023-09-27
bb2ICCEInternational Conference on Computers in Education2014-11-30
cbACCVAsian Conference on Computer Vision2024-07-062024-09-152024-12-08
aa*a1ICCVInternational Conference on Computer Vision2025-03-072025-06-252025-10-19
baa1ICCADInternational Conference on Computer-Aided Design2024-04-282024-06-302024-10-29
ba2ICCDInternational Conference on Computer Design2025-05-112025-08-012025-11-10
Revistas Relacionadas
CCFNombre CompletoFactor de ImpactoEditorISSN
bComputer-Aided Design3.000Elsevier0010-4485
cIET Computer Vision1.500IET1350-245X
aInternational Journal of Computer Vision9.3Springer0920-5691
ComputersMDPI2073-431X
aIEEE Transactions on Computers3.600IEEE0018-9340
aACM Transactions on Computer Systems2.000ACM0734-2071
IEEE Computer2.000IEEE0018-9162
bJournal of Computer SecurityIOS Press0926-227X
bComputer Networks4.6Elsevier1389-1286
Computers and CompositionElsevier8755-4615